1. Field of the Invention
This invention relates to a process for forming implanted regions with lowered channeling risk on semiconductors. More specifically, the invention concerns a process applied to semiconductor electronic devices having at least one layer of polycrystalline silicon which covers both isolation regions and active areas liable to channelling phenomena. In particular the process relates to the formation of resistors in doped polycrystalline silicon.
2. Discussion of the Related Art
As is well known, in the manufacture of several semiconductor electronic devices, and specifically the manufacture of static random access memories (SRAMs), ample recourse is made to ion implantation techniques for doping both buried regions of the semiconductor and thin polycrystalline layers.
Such is the case, for instance, with the formation of resistors in thin polysilicon films covering active areas and/or isolation regions of a SRAM storage cell. These resistors are generally formed by implantation in the polycrystalline layer covering the so-called field oxide regions which are located at the boundaries of the active channel region of a field-effect transistor constituting said storage cell.
Normally, such resistors are formed by implanting boron ions in the thin polycrystalline film. However, during the implantation step, there may occur a so-called channelling phenomena, wherein some ions are channelled along preferential directions defined by the crystalline nature of the film and which penetrate the semiconductor as far as the substrate underlying the polycrystalline layer, thereby altering the electric characteristics of the device.
The extent of the channelling phenomenon is tied to various parameters, such as the thickness of the thin film, atomic species implanted, and implanting energy. Boron is, in fact, one of the atomic species which is most susceptible to the channelling phenomenon.
In many cases, the phenomenon is enhanced by the size of the grains which make up the thin polycrystalline layer. The size of these grains is generally of a comparable order to the layer thickness dimension. As an example, note that channelling phenomena have been detected in a substrate with boron implantations performed at 25 keV on polycrystalline silicon 2000-Angstrom thick.
To obviate this serious drawback, the prior art has proposed a first method which consists of implanting different species effective to make the polycrystalline layer somehow "amorphous", thereby reducing the proportion of dopant affected by the channelling phenomenon. It has been found, for instance, that an implantation of boron fluoride (BF2) can achieve a dual goal. It quickly amorphousizes the polysilicon thus attenuating the channeling risk, and it still allows the resistor implantation. However, this prior art method has a drawback in that fluorine ions which are left in the polycrystalline layer harm the electrical characteristics of the resistors formed therein.
A second prior art proposed method requires an oxidation of the polycrystalline silicon before the resistors are implanted. In fact, the oxide layer can effectively randomize the trajectory of the incident ions thus reducing the proportion of dopant effected by channeling. It will be appreciated, however, that this second proposed method introduces an additional process step, resulting in a more costly process of manufacture of the corresponding devices.
Another proposed method could be that of masking the areas of the device which are not to be implanted by the resistor implantation step, using a photoresist. However, this method would also introduce a cost-intensive additional step in the manufacturing process.
Accordingly, it is an object of this invention is to provide a process for forming implanted regions with low channelling risk, wherein the process includes peculiar functional features to effectively overcome the above-mentioned drawbacks associated with the prior art methods.